In the write-back operating mode, writes to cached blocks are going to the cache device only, with such blocks marked as dirty in the metadata.
But the write-back mechanism also contained a mini arithmetic unit, which the processor used for several purposes.
Both write-back and write-through (which is the default) policies are supported for caching write operations.
While the data must still be written back eventually, the write-back may be deferred.
As was common at the time, the memory boards contained a write-back circuit to solve the destructive-read problem inherent to magnetic core memory.
This is an optimization for write-back caches snooping the bus.
It is direct-mapped, uses a write-back write policy and an on-write allocation policy.
The data cache uses the write-back write protocol.
